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Advanced verification techniques [electronic resource] : a systemC based approach for successful tapeout

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Advanced verification techniques [electronic resource] : a systemC based approach for successful tapeout
Original Title Advanced verification techniques [electronic resource] : a systemC based approach for successful tapeout
Author Singh, Leena, 1971-, Drucker, Leonard, Khann, Neyaz
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Topics Integrated circuits, TECHNOLOGY &amp, ENGINEERING, TECHNOLOGY &amp, ENGINEERING, Integrated circuits
Publisher Boston : Kluwer Academic Publishers
Collection folkscanomy_miscellaneous, folkscanomy, additional_collections
Language English
Book Type EBook
Material Type Book
File Type PDF
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Support Mobile, Desktop, Tablet
Scan Quality: Best No watermark
PDF Quality: Good
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Advanced Verification Techniques: A SystemC Based Approach for Successful TapeoutAuthor: Leena Singh, Leonard Drucker, Neyaz Khan Published by Springer US ISBN: 978-1-4020-7672-5 DOI: 10.1007/b105272Table of Contents:Introduction
Verification Process
Using SCV for Verification
Functional Verification Testplan
Testbench Concepts using SystemC
Verification Methodology
Regression/Setup and Run
Functional Coverage
Dynamic Memory Modeling
Post Synthesis Gate SimulationIncludes bibliographical references (pages 371-372) and indexIntroduction — Verification Process — Using SCV for Verification — Functional Verification Testplan — Testbench Concepts using SystemC — Verification Methodology.-Regression/Setup and Run — Functional Coverage — Dynamic Memory Modeling — Post Synthesis Gate Simulation — Appendices”As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks.”–Stuart SwanPrint version record
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