Analog circuit design : fractional N synthesizers, design for robustness, line and bus drivers
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Author: Workshop of Advances in Analogue Circuit Design (12th : 2003 : Graz, Austria), Roermund, Arthur H. M. van, Steyaert, Michiel, 1959-, Huijsing, Johan H., 1938-
Added by: sketch
Added Date: 2015-12-30
Language: eng
Subjects: Linear integrated circuits, Frequency synthesizers, Electronic circuit design
Publishers: Boston : Kluwer Academic Publishers
Collections: journals contributions, journals
ISBN Number: 1402075596
Pages Count: 178
PPI Count: 178
PDF Count: 1
Total Size: 117.17 MB
PDF Size: 29.43 MB
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Edition: [Online-Ausg.].
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Description
Analog Circuit Design: Fractional-N Synthesizers, Design for Robustness, Line and Bus Drivers
Author: Arthur van Roermund, Michiel Steyaert, Johan H. Huijsing
Published by Springer US
ISBN: 978-1-4020-7559-9
DOI: 10.1007/b105729
Table of Contents:
Rev. and extended tutorials presented at the 12th Workshop of Advances in Analog Circuit Design (AACD) held at 15-17 April 2003, in Graz, Austria
Includes bibliographical references and index
Author: Arthur van Roermund, Michiel Steyaert, Johan H. Huijsing
Published by Springer US
ISBN: 978-1-4020-7559-9
DOI: 10.1007/b105729
Table of Contents:
- Practical Design Aspects in Fractional-N Frequency Synthesis
- Design and Simulation of Fractional-N Frequency Synthesizers
- Monolithic CMOS Fractional-N Frequency Synthesizer Design for High Spectral Purity
- A 19mW 2.2GHz Fully Integrated CMOS Sigma Delta Fractional Synthesiser With 35Hz Frequency Step and Quantization Noise Compensation
- Implementation Aspects of Fractional-N Techniques in Cellular Handsets
- Fractional-N Phase Locked Loops and It’s Application in the GSM System
- ESD for Analogue Circuit Design
- ESD in Smart Power Processes
- RF-ESD Co-Design for High Performance CMOS LNAs
- Improvement of System Robustness Through EMC Optimization
- Robustness in Analog Design
- Minimizing Undesired Coupling and Interaction in Mixed Signal ICs.
- Looking to/for Low Power ADSL Drivers in the DSLAM.
- Class-AB Low-Distortion drivers for ADSL
- Class D Self-Oscillating Line Drivers
- Class G/H Line Drivers for xDSL
- The USB 2.0 Physical Layer: Standard and Implementation
- Backplane Transceivers
Rev. and extended tutorials presented at the 12th Workshop of Advances in Analog Circuit Design (AACD) held at 15-17 April 2003, in Graz, Austria
Includes bibliographical references and index
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