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Computer aided verification : 13th international conference, Paris, France, July 18 – 22, 2001 , proceedings

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Computer aided verification : 13th international conference, Paris, France, July 18 22, 2001 ; proceedings

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Author: Berry, Gérard Hrsg. edt, CAV 13 2001 Paris (DE-601)330611690 (DE-588)10022578-0, CAV (13 2001.07.18-22 Paris), International Conference on Computer Aided Verification (13 (Paris) : 2001.07.18-22)

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Added Date: 2015-12-30

Language: eng

Subjects: Verifikation, Online-Publikation, Kongress, Paris <2001>

Publishers: Berlin [u.a.] Springer

Collections: folkscanomy miscellaneous, folkscanomy, additional collections

ISBN Number: 3540423451, 9783540423454

Pages Count: 300

PPI Count: 300

PDF Count: 1

Total Size: 283.61 MB

PDF Size: 6.93 MB

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Edition: [Elektronische Ressource]

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Computer Aided Verification: 13th International Conference, CAV 2001 Paris, France, July 18–22, 2001 Proceedings
Author: Gérard Berry, Hubert Comon, Alain Finkel
Published by Springer Berlin Heidelberg
ISBN: 978-3-540-42345-4
DOI: 10.1007/3-540-44585-4

Table of Contents:

  • Software Documentation and the Verification Process
  • Certifying Model Checkers
  • Formalizing a JVML Verifier for Initialization in a Theorem Prover
  • Automated Inductive Verification of Parameterized Protocols?
  • Efficient Model Checking Via Büchi Tableau Automata?
  • Fast LTL to Büchi Automata Translation
  • A Practical Approach to Coverage in Model Checking
  • A Fast Bisimulation Algorithm
  • Symmetry and Reduced Symmetry in Model Checking?
  • Transformation-Based Verification Using Generalized Retiming
  • Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions
  • CLEVER: Divide and Conquer Combinational Logic Equivalence VERification with False Negative Elimination
  • Finite Instantiations in Equivalence Logic with Uninterpreted Functions
  • Model Checking with Formula-Dependent Abstract Models
  • Verifying Network Protocol Implementations by Symbolic Refinement Checking
  • Automatic Abstraction for Verification of Timed Circuits and Systems?
  • Automated Verification of a Randomized Distributed Consensus Protocol Using Cadence SMV and PRISM?
  • Analysis of Recursive State Machines
  • Parameterized Verification with Automatically Computed Inductive Assertions?
  • EVC: A Validity Checker for the Logic of Equality with Uninterpreted Functions and Memories, Exploiting Positive Equality, and Conservative Transformations

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