About this Book

This book exhibits a unique way of explaining nanomaterials and devices and analyzing their design parameters to meet the sub-nanoregime challenges for low-power chip design. Since process variability, device sizing, and power supply scaling are ongoing challenges in very large-scale integration (VLSI) circuit designs, this book highlights the conventional and novel nanomaterials, devices and circuits, leakage current mitigation techniques, and other important trade-offs along with exhaustive analysis. More focus has been placed throughout the book on various trade-offs for high-speed and low-power VLSI devices and circuits co-design.

This book:

• Discusses advanced nano-semiconductor devices such as FinFET, nanowires, tunnel field-effect transistors, carbon nanotube field-effect transistors, and high-electron-mobility transistors.

• Presents high-performance semiconductor devices at nanoscale technology nodes for the analysis of quantum effects and their impact on circuits and systems.

• Covers power dissipation and reduction techniques for high-performance devices.

• Explains both silicon and non-silicon devices for various applications like digital logic and analog/radio frequency applications.

• Examines the difficulties and practical design approaches for extremely low-power analog-integrated circuits.

It is primarily written for senior undergraduates, graduate students, and academic researchers in the fields of electrical engineering, electronics and communications engineering, materials science, nanoscience, and nanotechnology.